Dr. Joseph A. Elias, Adjunct Faculty

University of Kentucky, Department of Electrical and Computer Engineering

Cypress Semiconductor

 

A Cadence University Program Member

This class uses only software provided by Cadence Design Systems, Inc.  We do not provide information for using software from other vendors.

 

EE584 Introduction to VLSI

Syllabus, Admin

Syllabus Fall 19

Plagiarism

Feedback

Tentative Schedule, Topics

Campus Calendar Fall 19

EE584 F19 Schedule and Topics

Guest Lectures

Bipolars in a CMOS World

Modeling

Metal Layers

Active Layers

Cross Section to Layout Mapping

Cross Section Practice

Lectures

VLSI Overview

Lecture 00: Periodic Table

Lecture 00: Class Introduction

Lecture 01: Overview VLSI

Lecture 01: Overview of IC Design Flow

Baker C01: Introduction to CMOS Design

Baker C02: The Well

Supplemental Diode Details

Unix Basics

Baker C03: The Metal Layers

Baker C04: The Active and Poly Layers

Cypress-Cadence Layers and Cross Section

Lecture 04: Device Physics I

Baker C05: Resistors, Capacitors, MOSFETs

Baker C06: MOSFET Operation

Baker C07: Process

Baker C08: Noise

Baker C09: Modeling-Analog

Baker C10: Modeling-Digital

Baker C11: The Inverter

Baker C12: Static Logic Gates

Baker C13: Clocked Circuits

Baker C14-C24: Advanced VLSI

Writing, Software

Unix Basics

Lecture 06b: Technical Writing

Lecture 00: Class Introduction

Lecture 07a: Cadence Basics

Non-Baker Lectures

Lecture 01: Processing DVD

Lecture 01: Processing Video

Lecture 02: Transistors I

Lecture 02: Transistors I - Details

Lecture 03: Semiconductor Processing

Lecture 04: Device Physics I

Lecture 05: Device Physics II

Lecture 06: Device Physics III

Lecture 07: Layout and Rules

Lecture 08: NMOS, Pseudo-NMOS

Lecture 09: CMOS Gates, Power

Lecture 10: CMOS Gate Design

Lecture 11: Transmission Gates and Latches

Lecture 12: Multiplexers and Decoders

Lecture 13: Flip Flops and DA1

Lecture 14: Timing and Delays

Lecture 15: Input / Output Circuits

Lecture 16: DA1, Introduction to Memories

Lecture 17: DA2, Design Margins

Lecture 18: DA2, DRAMs

Lecture 19: DP, EEPROMS/FLASH

Lecture 20: DP, EEPROMS/FLASH II

Lecture 21: DP, Testing

Lecture 22: Liberty Files

Non-CAD Homework

For HW1, come prepared to class to answer at least one question.

HW 1: Due 09/04/19

HW 2: Due 09/11/19

HW 3: Due 09/30/19

HW 4: Due 10/16/19

Homeworks due BEFORE class on due date

CAD Homework

CAD 0: Login Due 09/04/19

CAD 2a: NWell Due 09/13/19

CAD 2b: Diff Due 09/20/19

CAD 4a: Inverter Due 10/4/19

CAD 4b: Inv RCX Sim Due 10/11/19

CAD 5: FET WL Folding Due 10/18/19

CAD 6a: FET CV sims Due

CAD 6b: FET IV sims Due

CAD 11: VTC Due

CAD 12: ND NR RCX sims Due

CAD SW

CAD Project

These assignments use electronic design automation (EDA) software provided by Cadence Design Systems, Inc.  Students design circuits from the schematic level through layout design, extraction, and simulation.

Project Proposal

Possible Projects

Find VIH VIL

Powerpoint Template

Grades

Eldo

Eldo User's Reference

Eldo Sources

Eldo Commands

Easy Eldo

Eldo DC Template

Eldo AC Template

Cadence, Linux Tutorials

Various Tutorials, see below for others

Inverter Tutorial S18

Attaching Technology Tutorial S18

Setting Default Grid

Mac Remote Login (Kingfisher)

VIM Adventures

Symbols1

Symbols2

Symbols3

Symbols4

Scripting Examples

eldoDataToCSV

make_csv_from_chi

makePWLfromCSV

modifyNetlistAP

tansientAnalysisToCSV

fileParse

Field Trips

Job Opportunities

 

Last Updated 08/26/2019 by Dr. Elias

Questions/Comments?  Contact Dr. Elias

 

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